SHARP 2026: Hardware Security Conference

Welcome to the first edition of SHARP 2026, organized by eShard in collaboration with NTU NiCE Labs.

Day 1 is a full-day conference designed to bring together Singapore's hardware and embedded security ecosystem. We will explore the critical gap between theoretical models and practical, real-world silicon behavior, focusing on the expertise needed to face hardware surprises and uncover the truth hidden inside the chip.

🎟️ Your Day 1 ticket includes:

• Full-day access to the conference
• Lunch, coffee & snack breaks — flag any dietary restrictions at registration
• A Grab transport voucher to ease your commute

On Day 2, we'll do hands-on experimentation on real hardware, guided by our experts. Want the full SHARP experience? as well.

ReadOut Protection (RDP) is meant to stop attackers from extracting firmware from a chip, but it has been challenged by hardware attacks for over a decade. This talk walks through how these bypass techniques have evolved, from simple early tricks to more advanced methods like voltage glitching. It also shares eShard's own test results, showing that an attack which works on one microcontroller often needs to be reworked for another, even a close relative.

Post-quantum cryptography (PQC) is a fast-moving field, and so are the attacks against it. This talk presents the method eShard uses to track new research, test the most promising attacks first in simulation and then on real hardware, and keep an up-to-date picture of how secure PQC implementations really are.

A newer type of laser, called femtosecond biphoton, has been proposed as a more precise alternative to the traditional nanosecond lasers used to inject faults into chips. This talk shares eShard's first tests with this technology, comparing it to their usual setup. The new laser does produce very precise faults, but it also comes with new practical challenges, and some of the benefits described in earlier research were not clearly confirmed in eShard's own tests.

We are incredibly excited about the experts joining us for this first edition of SHARP! While we are keeping the final names under wraps just a little longer, rest assured that our stage will feature a curated group of top-tier professionals.

Details on speakers and exact timeslots will be revealed closer to the event, and the agenda below remains subject to change.

This talk looks at how chips can defend themselves using built-in, low-cost sensors and AI that constantly watch for physical attacks and react in real time. It also covers hardware patching, a way for chips to update themselves and learn to counter new attacks as they are discovered.

This talk explores the transition toward PQC deployment and the practical challenges of evaluating PQC solutions, covering security considerations like side-channel attacks (SCA) and fault injection attacks (FIA), and looking at these across different platforms and applications, including embedded and hardware environments. It will also include a practical evaluation of PQC implementations.

TVLA is a standard method for checking whether a chip leaks secret information, required under FIPS 140-3. The problem is that the current testing standard, ISO 17825, was not built with post-quantum algorithms in mind. This talk shows how to adapt TVLA for ML-KEM and ML-DSA, with real test results and tips to avoid false alarms.

...more to be revealed soon!

This day is tailored for students and professionals looking to deepen their expertise, connect with local actors, and share knowledge:

• Security Researchers from industry and government sectors.
• Academics specializing in hardware and embedded cryptography.
• Engineers & Evaluators looking to bridge the gap between theory and practical application.

Day 1 is just the start. Day 2 offers a hands-on session where you'll get to test a fault injection attack on real hardware.

Make sure to register for it too if you want the full SHARP 2026 experience → https://www.eventbrite.fr/e/sharp-2026-hardware-security-workshop

Info: Please arrive a little early so we can begin on time.

Info: Optional.

Event venue & nearby stays

National Integrated Centre for Evaluation @ NTU, 50 Nanyang Drive, 04-23 X-Frontier Block, Jurong, Singapore

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